• C (Buona)
• VHDL (Buona)
• Xilinx ISE (In fase di studio)
• Altera Quartus II (Buona)
• CPLD (Buona)
• FPGA (Buona)

Luglio 2011_Laurea Specialistica Ing.Elettronica

August 2014– Actual Role FPGA Designer Name of employer Eurocontrol S.p.a. Project/Area Defense/Video Processing Systems Project Description SMPTE-ITU compliant digital video acquisition, buffering and processing. Frame reader, frame buffer, color plane sequencer, color space converter cores design. 2D graphics acceleration core design to accelerate rendering in GUI based embedded system. Main activities RTL coding and simulation; timing closure analysis; FPGA on chip debug Tools VHDL, C , Quartus Prime, Modelsim, ARM cortexA9, Cyclone SoC

July 2012– July 2014 Role Electronic Designer Name of employer Clear S.r.l. Project/Area “Biomedical Laser design .“ Project Description Bidimensional laser scanning system design. Laser beam deflection unit control, power emission control and power monitoring embedded board design. Software PWM control of laser optic power and FPGA monitorng of laser operating current. Main activities Board schematic entry Microcontroller C code development FPGA digital logic design Tools VHDL, C programming, ARM GNU Toolchain, Orcad Suite, Quartus II, Modelsim, ARM cortex-m

November 2011– June 2012 Role FW/SW Engineer Contract of Employement Internship Name of employer AGS Group. Project/Area “Building automation system “ Project Description Home automation system with centralized control of lighting, appliances, heating, air conditioning. A network of embedded MCU boards controlling sensors (temperature, motion detection, daylight) and actuators ( motorized valves, light switches, motors). Home residents interact with the system for monitoring and control by applications running on smartphone over a wireless network. Main activities Bare metal firmware development RTOS applications and driver development Tools Kinetis K60 MCU, CodeWarrioir Eclipse IDE, C programming language, MQX RTOS,I2C, RS232-485

Education and training Dates December 2010 – May 2011 Contract of Employement Thesis Job Name of the Institute providing education and training WASS S.p.a. Project/Area “Board test application for an FPGA-based board within an underwater obstacleavoidance system” Main activities Power on self test run by FPGA embedded hard core processor (PPC440). Hardware interfaces between PPC440 and external resources implementation in FPGA logic using VHDL coding and FPGA tools. Project validation on a Xilinx FPGA Virtex 5 hardware framework. Tools VHDL , C, Xilinx Virtex 5 FPGA, DDR2, Flash Memory, Xilinx ISE Dates December 2007 – July 2011 Title of qualification awarded Master of Science MICROELECTRONIC ENGINEERING Principal subjects Analog Circuits; Digital Circuits Design; Microelectronic Systems Design; RF Integrated Circuits; Electronics for Mobile Communication Systems; Electronic Control Systems; Electronic Constructions Name of the Institute providing education and training University of PISA, ITALY Date of Graduation 22nd of July, 2011 Dates September 2003 – December 2007 Title of qualification awarded Bachelor of Science ELECTRONIC ENGINEERING Principal subjects Architecture of the Electronic Systems; Analog and Digital Communication Systems; Electronic Devices; Analog and Digital Circuits. Name of the Institute providing education and training University of PISA, ITALY Date of Graduation 14th of December, 2007 Dates September 1998 – July 2003 Title of qualification awarded Classical Lyceum Diploma Name of the Institute providing education and training Secondary High School “Quinto Orazio Flacco “ – Venosa (Potenza), ITALY Date of Graduation July 2003

Personal skills and competences Mother tongue Italian Other language English 

Technical skills and competences  Applications: Eclipse IDE , Altera Quartus , Modelsim Altera.  Programming languages: C , Assembly ,VHDL , Verilog. Computer skills and competences MS Office Suite ; MS Windows ; Linux, Unix.