Figura professionale: Firmware engineer and team leader
Nome Cognome | : R. P. | Età | : 48 |
---|---|---|---|
Cellulare/Telefono | : Riservato! | : Riservato! | |
CV Allegato | : Riservato! | Categoria CV | : Project Manager/Architetto SW/ IT Manager |
Sede preferita | : Milano |
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Sommario
Esperienze
June 2011 – present R&D FW/SW/HW Team Leader R&D Division, Selta S.p.A., Italy ▪ Project engineer for embedded systems (FPGA, DSP, Microcontrollers, Microprocessors) ▪ System architecture specification and design ▪ Project management, team building ▪ Analysis of tender’s specifications ▪ Analysis of competing products ▪ Project forecast analysis and cost control ▪ System architecture specification ▪ Feasibility study for new telecontrol and telecommunication projects/products Business or sector Industry
October 2009 – June 2011 R&D Software/Firmware project engineer Power Line Communication and Teleprotection Division, Selta S.p.A., Italy ▪ Project engineer for embedded systems (FPGA, DSP, Microcontrollers, Microprocessors) ▪ System architecture specification and design ▪ Software engineer for equipment’s craft terminal Business or sector Industry
September 2007 – October 2009 R&D Software/Firmware project engineer Telecontrol and Substation Automation Division, Selta S.p.A., Italy ▪ Project engineer for embedded systems (FPGA, DSP, Microcontrollers, Microprocessors) ▪ System architecture specification and design ▪ Requirements specification, software developer and tester Business or sector Industry
January 2006 – September 2007 Post Doc position at Department of Information Technology, University of Parma ▪ Software Simulation of Channel Coding, Modulation and Synchronization Algorithm for Power Line Communication on High-Voltage lines Business or sector Academia
EDUCATION 2003-2005 PhD in Information Technology – Thesis Title: “On Power Line Communications” ▪ Modulation (QAM, PSK, OFDM) ▪ Channel coding (TCM, LDPC, BCH, RS, BICM, Block and Convolutional Codes) ▪ Magnetic channel (Hard-disk, CD-ROM, channel equalization, detection strategy, estimation theory) ▪ Synchronization algorithm 1995-2002 Laurea degree in Telecommunication Engineering (5 years program) – Thesis Title: “Riduzione degli effetti del rumore nei sistemi di memorizzazione mediante tecniche di predizione lineare” – 106/110 ▪ Magnetic channel (Hard-disk, CD-ROM, channel equalization, sufficient statistics) ▪ Signal processing, detection and estimation theory
PERSONAL SKILLS Mother tongue(s) Italian Other language(s) English B2 French A2
Other skills ▪ Programming languages (C, C++, Visual C++, VHDL, Verilog, Assembly, MATLAB) ▪ Operating systems (Windows, Linux, TI Bios) ▪ Knowledge of Data Communication protocols (UART, SPI, USB, I2C, McASP, RS-485/422, CAN) ▪ Expert in digital signal processing, statistical detection and estimation algorithm, digital modulation and channel coding ▪ Expert in design and development of analogue and digital circuits ▪ Expert in embedded system design (FPGA, DSP, Microcontrollers, Microprocessors) ▪ Knowledge of Telecontrol Communication standards (IEC 60870-5-104, MODBUS, IEC 61850) ▪ Knowledge of Industrial IoT Communications protocols (LoRa, NB-IoT) ▪ Knowledge of Telecommunication standards (DVB-T/T2, DAB) ▪ Knowledge of Wireless Communication standards (Wi-Fi, Bluetooth) ▪ Knowledge of Modern Channel Code Solutions (Turbo Codes, Low Density Parity Check Codes, BICM, Multilevel codes, Iterative/turbo processing) and classical solutions (BCH, RS, Viterbi and BCJR) ▪ Knowledge of MS Project and MS Office
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