01.04.2018-28.05.2019                        Master Thesis:

                                                   Technische Universität Chemnitz, Chemnitz (Germany)

·         IOTA over LoRaWAN: Enabling application layer protocol on            LPWAN Communication Systems using C++ and JS

·         Implementation of sensor node using Raspberry Pi and LoRaWAN module via UART, i2C, SPI interfaces

·         Integration of LoRa app server using RESTful JSON API (Python) 

01.05.2017-31.03.2019           Working Student & Internship:

   (18 months)                                               SAP Innovation Center Network, Dresden (Germany)

·         Implementation of UI automation tests and performance tests for a WPF application

·         Analyzed and adapted many failing UI and performance tests on a daily basis

·         Development of Integration Tests Using Kotlin

·          Build Tool analysis comparing Webpack, Gulp and Grunt to improve web application performance

·         Developing a Blockchain Web application with MultiChain

·         Tools and Tech : C#, Kotlin, HTML(basics), CSS(basics), JS(basics), Jenkins, Git and Telerik Test Studio

ACADEMIC PROJECTS

02.2013-06.2013       EAST WEST INSTITUE of TECHNOLOGY, Bangalore, India

                               Title:

                                 "Bus Detection Device for the Blind using Passive RFID Application”

 BACHELOR THESIS DESCRIPTION:

In this project, we use AT89S52 microcontroller and RFID, where RFID reader is connected to                                                                                                                                                                         microcontroller based embedded board and a program is running which will analyze tag data on the bus. We use software development Tools such as Keil and Embedded C. The scope of this project is to aid the blind people.

04.2016-07.2016          Technische Universität Chemnitz, Chemnitz, Deutschland

                                  Title:

                              “Implementing a Netlist Equivalence Checker using SAT Approach using C++”

 PROJECT DESCRIPTION:

In this project, we formally check two given netlists for equivalence using a SAT-based approach. This method is implemented by a C++ program that reads in two netlists files in a specified format.           An executable Cpp code was prepared to check equivalence using Davis Putnam Algorithm reduction technique. 

10.2015-01.2016         Title:

                                  “Design and Synthesis of an ALU in VHDL using MENTOR and XILINX-ISE                design tools”                                                                                                  

PROJECT DESCRIPTION:

In this project, we design an ALU that can add, subtract, multiply and divide unsigned integer values. Although the primary aim is not to transform this ALU into an FPGA, but only the synthesizable subset of VHDL shall be used in the code. The main goal is to gather knowledge in synthesis compatible VHDL description and experience in MENTOR and XILINX-ISE design tools.

TECHNICAL CERTIFICATES

CISCO ACADEMIC DEGREE CERTIFICATE- CCNA NETWORK FUNDAMENTALS

PROGRAMMING SKILLS

 C/C++ (Good), JAVA (Intermediate), VHDL (Good), Javascript (Good), MATLAB (Good), Python (Good), C# (Good), Kotlin (Intermediate)                                                                                                                             

 OPERATING SYSTEMS AND SOFTWARE

 Microsoft Windows, Linux, Github, Jekins, Telerik, IntelliJ Idea, Visual Studio, REST API, JSON, Microsoft Office

LANGUAGES

English

Fluent

University Certificate C1

Deutsch

Good

University Certificate B1

Kannada

Fluent

MotherToungue

EDUCTAION

10.2014-present        Master of Science in Information and Communication Systems   

                               Technische Universität Chemnitz, Chemnitz, Deutschland

Modules: Optical Communication Networks, Electronic Design Automation, Components and Architecture of Embedded Systems, Design for testability, Network Simulation lab, Wireless Broadband Data Reception, Next Generation Internet, Network Planning, IP Network, SON, Digital Signal Processing, TV and Video Signal Processing

Current Score: 2.6
09.2009-06.2013       Bachelor Degree in Electronics and Communication Engineering

(4 Years)                   East West Institute of Technology, Bangalore, India

Modules: Wireless Communication, Embedded Systems, Network Analysis, Computer Communication Networks, Signals and Systems, Computer Components and C programming, C++, Information Theory and Coding, Digital Signal Processing, ADSP, Analog and Digital Communication, Microcontroller and Microprocessor

                               Final Result: 2.38