From February 2015 till now:
I started working at a small family business in charge of assembling and testing cables and designing PCBs for performance and
manufacturability for a major phone Italian company.

From September 2010 to October 2014:
Package Design Engineer in Micron Technology
I provided package definition and designs for advanced semiconductor devices. I worked with a cross-functional team across several
geographies to create package design databases such as package stack-up, simulation, route-study, substrate/leadframe layout, wirebond
diagrams, and other design documentation.
Design for optimum electrical performance, manufacturability, and package reliability.
Supporting signal and power integrity analysis requests on LPDDR2/3, NAND, microcontroller stand alone or within same package (Multi
Chip Package).
Drawings, Package Outline Drawings, Interposer Drawings, and Wirebond Diagrams.
Feasibility/What-If analysis (Stacking assessment & Silicon device placement), Thermal & Mechanical simulation, electrical
performance and EMC compatibility assessment, Design of System-In-Package solutions (BGA, uSD, TSOP package types) for high
integration products with Microcontroller+Memory (RAM and/or Non-Volatile) + discrete components (Capacitors, Resistors, etc.)
StackUp & DieFit simulation, extraction of RLC parasitic package parameters, Signal Integrity analysis by SPICE circuit simulation for
System-In-Package Microcontroller+Memory (RAM and/or Non-Volatile) + discrete components (Capacitors, Resistors, etc.)
Join the wafer level bumping process establish for WLCSP, Solder bump, Cu-pillar bump, Cu/Ni/Au RDL, eWLB package.
Interact with key Business Unit stakeholders and recommend package solutions to meet customer and/or market requirements.

From March 2008 to September 2010:
Package Design Engineer in Numonyx
As Package Design Engineer I worked with multiple design teams to create various package design drawings and documents.
Some of the major drawings were: circuit board layouts for semiconductor memory devices, electrical wire connection diagrams,
and memory device package outline drawings.
I required to research design rules and industry drafting standards to maintain global consistency and accuracy of design drawings.
As Engineering job responsibilities are included performing design feasibility studies with written reports of findings;
communicating with customers to resolve manufacturing issues; and working with software companies to develop software solutions;
and writing software codes for automation.
I utilized appropriate design rules for package application;
I designed for optimum electrical performance, manufacturability, package reliability;
I worked through required engineering teams to make updates to design rules;
I created initial circuit board layout feasibility reports;
I performed circuit board route studies;
I performed cross-functional team design reviews;
Establish design gap analysis for subcontractor proposals.
I resolved substrate manufacturing issues (Vendor Design Approval).
Daily use in Cadence (SiP Digital Layout and Allegro Package Designer software) and AutoCAD of Autodesk to create documentations.

From January 2004 to March 2008:
BGA/Module Substrate Design Engineer
in STMicroelectronics Kirkop – Malta and from September 2007 in STMicroelectronics Agrate Brianza – Italy
Working in the backend field of PCB substrate, IC assembly and wafer bumping.
After more than one year of training in STMicroelectronics Grenoble (France) as BGA/Module Substrate Designer Engineer I worked
with multiple design teams to create various package design drawings and documents.
Some of the major drawings were: circuit board layouts for semiconductor memory devices, electrical wire connection diagrams,
and memory device package outline drawings.

Education 2000 Master Degree in ELECTRONIC ENGINEERING
University: UNIVERSITA' DEGLI STUDI DI NAPOLI "FEDERICO II" at the College of Engineering.
Thesis: “Use of spectrum analyzers for measurements on telecommunication signals”
2004 Professional Practice Exam: qualified to the profession of Engineer by passing the Italian State examination