Figura professionale: Ingegnere Elettronico

Nome Cognome: G. D.Età: 34
Cellulare/Telefono: Riservato!E-mail: Riservato!
CV Allegato: Riservato!Categoria CV: Engineering
Sede preferita: Roma e dintorni

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Sommario

Ingegnere Elettronico

Esperienze

WORKING EXPERIENCES
    • Integration Engineer in Ericsson Telecomunicazioni S.P.A, via Anagnina 203 Rome
    • Duration: 1 September 2018-Today
    • Type of Contract: Indeterminate Time, Job Stage 4
    • Line Manager: Claudio Cola

Tasks:   5G Core Network and Cloud, Network Function Virtualization, Linux Operative Systems, Network Function Orchestrator, NFVI, NFV Integration, Bash and Python scripting.

    • Stagist in Ericsson Telecomunicazioni S.P.A,via Anagnina 203 Rome
    • Duration: 1st September 2017-31th August 2018
    • Line Manager: Andrea Pamio

Acquired Skills:   Red Hat Openstack Virtualization, Cloud Networks, Switch Extreme Configurations, Linux based Operative Systems, Ericsson Virtual Network Function installation and configuration, Dell Server Hardware Knowledge, Operation and Maintenance of a Cloud Environment, Troubleshooting e Teamwork.

MAIN RELEVANT PROJECTS:
    • Integration Engineer in POC 5G for TIM customer in Turin
    • Duration: January 2018-May 2018 
    • Project Manager: Anna Sessler
    • Technical Coordinator: Gianluca Consalvi

Tasks:   As a part of the 5G team I worked in the CEE R6.6.1 installation and configuration and NFV integration in cloud environment for the packet core network.

    • Integration Engineer in JTS 5G for TIM customer in Turin
    • Duration: May 2018-July 2018 
    • Project Manager: Anna Sessler
    • Technical Coordinator: Gianluca Consalvi

Tasks:   As a part of the integration team I worked in the NFV integration and VM deployment with related software configuration.

    • Integration Engineer in WiFi Calling for TIM customer in Rome
    • Duration: July 2018-October 2018 
    • Project Manager: Rita Martone
    • Technical Coordinator: Francesco Agnoni

Tasks:   I worked in the infrastructure team, we deployed the cloud environment for the requested NFV of the project.

    • Integration Engineer in GPRS for Wind-H3g Customer in Rome
    • Duration: October 2018-December 2018 
    • Project Manager: Enzo Falzone
    • Technical Coordinator: Roberto Annuale

Tasks: As a part of the cloud infrastructure team I worked in CCM of the HDS 8000 hardware for operation and maintenance and network configurations for packet core NFV.

    • Integration Engineer vIMS Upgrade for TIM Customer in Rome
    • Duration: October 2018-December 2018 
    • Project Manager: Emilios Kapodistrias
    • Technical Coordinator: Alessandro Maccari

Tasks: In this project I worked in the Hot File modification and in test deployment in Ericsson cloud lab in Rome for vSBG, vMTAS and vCSCF software upgrade.

    • Integration Engineer UNICA Project
    • Duration: January 2019-Today
    • Project Manager: Mercedes Huescar
    • Technical Coordinator: Luz Blanco

Tasks: In this project I worked in the UPA networking certification Team in VMs deployment, networking tests and troubleshooting.

CERTIFICATIONS

    • Red Hat Delivery Specialist – Infrastracture As a Service
Nov 2017-Nov 2019 Code: CLI-DEL-IAS-CRED

STUDIES

    • Master’s Degree in Electronic Engineering for Renewable Energy and Energy Efficency at University of Tor Vergata
    • Year: 2017
    • Degree Mark: 104/110
Master’s Degree Thesis “Programming an FPGA with a control algorithm for charging an onboard battery of a Micro-Satellite”
Tutor: Ing. Stefano Bifaretti
In this thesis work I programmed a Xilinx Virtex 5 Board with a digital control system for the energy harvesting optimization of 4 solar panels in order to charge the onboard battery of a Micro-satellite.

Subjects studied:   PCSV (design of circuits and VLSI systems), Optoelectronic and Telecomunication, (Optical Fiber, Optical-Electric and Electric-Optical commutators, optical communications, LED Diode, Laser, Photovoltaic Panels) ,Devices and Sensors (Physical nature of Electronic Devices and Sensors), Industrial Control Systems, Industrial Electronics (Static Converters, Inverters, Electronic Engines), Electronic for High Frequency, Electronic for Renewable Energy ( Physical nature of first, second, third and fourth Solar Panels, Electronic Circuits for Photovoltaic Systems) , Organic and Biological Electronic, Nanoelectronics (Photons and electrons interactions, nanometric transistors).

Main Relevant Projects:

    1. Project and design of an ASIC digital Circuit for the implementation of a 4 bit adder in static and dynamic logic, focusing on speed and electric power dissipated 

    2. Control System integration in Microcontroller for LED and thermic sensors for Domotics application.

    3. Design and physical implementation of a sixth order active Butterworth filter for audio applications.

    • Bachelor’s Degree in Electronic Engineering at Univ. Tor Vergata
          Year: 2013
          Degree Mark: 96/110
          Bachelor’s Degree Thesis: “Optimization of a sensorial system based on self adapted thermal modulation per biomedical applications”
          Tutor: Eugenio Martinelli
The job thesis was based on a electronic circuit which interfaces with sensors that gives informations on organic volatile compounds.

Subjects Studied: Bases of Electronic (Physical aspects of Diodes, Transistors and Field Effect Transistors,  electronic circuits; boolean logics;  sequential finite states machines), Analog Electronic (signal and power amplifiers; oscillators), Digital Electonic ( logical families; volatile and not volatile memories; ADC and DAC; programmable electronics ; FPGA; microcontrollers; processors), Signals and Networks ( logical networks; OSI model; Nyquist theorem; ecc.), Dynamic Control Systems (Bode and Nyquist diagrams; systems stability; ecc.), Theory of Circuits.

    • High School Diploma at Liceo Scientifico Giovanni Vailati, Genzano di Roma, Luglio 2009
          Voto: 90/100

TECHNICAL SKILLS
    • Embedded Systems and hardware projects design
    • VHDL
    • Xilinx Software (ISE) 
    • Matlab
    • C++
    • Pspice, Hspice 
    • Cadence Software (Orcad; ecc)
    • Labwiev
    • Microwind
    • Linux Operative Systems
    • Red Hat Openstack 

LANGUAGES
    • Italian
    • English Post-Intermediate C1 Level

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