Figura professionale: Electronic Engineer
Nome Cognome | : Q. G. | Età | : 32 |
---|---|---|---|
Cellulare/Telefono | : Riservato! | : Riservato! | |
CV Allegato | : Riservato! | Categoria CV | : Engineering |
Sede preferita | : FPGA |
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Sommario
Esperienze
Projects: FPGA implementation of high performance computing applications via High Level Synthesis Using Vivado HLS and Catapult tools to synthesize C functions into RTL implementation, and then pack into IP, and then using Vivado to integrate IP into hardware system. Design of a microwave filter Design a microwave filter, measure its radiated emission,simulate its behavior, and measure its prototype . Leg movement detection Design a pcb board, and then program the board to STM32 Nucleo, and then show the data that produced by the sensor but analysis-ed on the board in the app.
Scholarships & Awards: Scholarship provided by Edisu 2015-present First-class Scholarship for Excellent Student 02/2014 Beijing Municipal Scholarship 10/2013
Academic Research: Tesi in FPGA-based accelerator high level synthesis 2017/03-present Using different methods to improve the performance of accelerator. Internship in CASIA(Institute of Automation, Chinese Academy of Science) 2015.1- 2015.5 I was doing my graduation project thesis in CASIA. During these days, I Participated in a medical robot project, in which I took charge of the design of torque strain sensor.
Educational Qualification: Master degree: Politecnico di Torino 09/2015- 12/2017 Program: Electronic Engineering(for embedded system) Bachelor degree: Beijing Union University 09/2011- 07/2015 Program: Electrical Engineering
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