Figura professionale: WEB DESING

Nome Cognome: A. J.Età: 45
Cellulare/Telefono: Riservato!E-mail: Riservato!
CV Allegato: Riservato!Categoria CV: Web Designer/Social/Marketing
Sede preferita: Torino

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Sommario

WEB DESING

Esperienze

06.2013 – 02.2015 Davis, California Research Scholar Microwave Microsystems Laboratory, University of California at Davis 1) Design and Implementation of Envelope Modulator (consisting of a wide bandwidth linear amplification stage and an efficient DC-DC switching-mode buck converter in parallel) for Envelope Tracking Power Amplifier (LTE application with 20 MHz data bandwidth): i. Designed and implemented at discrete components level (PCB) for GaAs power amplifier. It was tested with a 25 dBm output power GaAs PA at carrier frequency of 0.9 GHz and 6% efficiency improvement was observed.  2) A 4-bit control Variable Gain Amplifier (by TSMC 0.13 μm design kit) IC designed for the frequency range of 5.6 – 5.875 GHz. The digital control input was 3.3 V for High and 0 V for Low.

01.2012 – 05.2013 Turin, Italy Research Assistant Microwave Electronics Laboratory, Polytechnic University of Turin 1) Programming a central command bench by Matlab, connecting 8510B Network Analyzer, 6624A DC Power Supply and 34401A Digital Multi-meter via General Purpose Interface Bus (GPIB) to PC, to analyze and measure DC and AC characteristics of an active device. It performs real-time calibration (error correction) of raw scattering parameters by SOLR / TRL / LRM algorithms. The outputs are: i. DC analysis of any active device (I-V characteristics) (the I-V pair points and their plot are saved as mat and fig files) ii. AC analysis of any device under test (with and/or without biasing) ( the raw and by-Matlab corrected S-parameters are saved as cti files, and their plot as fig file too ) 2) A 3.5 GHz GaN Doherty power amplifier was designed. Output power of more than 43 dBm and 6 dB back-off efficiency of 40% were obtained. 3) A 3-stage stacked MMIC power amplifier in GaAs pHEMT was designed. Gain higher than 9.5 dB with output power larger than 31.8 dBm and 27% efficiency at 21.5 GHz were obtained.

02.2003 – 09.2009 Tehran, Iran Automotive Manufacturing Industry i. 01.2007 – 08.2009 Electrical Engineer at Pars Khodro Car Manufacturing Company ii. 03.2004 – 05.2006 Production Engineer at Ettehad Motor Automotive Parts Supplier Company iii. 02.2003 – 02.2004Internship on communication systems at SAPCO Supply Automotive Parts Company

EDUCATION

01.2012 – 03.2015 Doctor of Philosophy, Electronics Engineering Polytechnic University of Turin

09.2009 – 09.2011 Master of Science, Electronics Engineering Polytechnic University of Turin

09.2005 – 09.2007 Master of Art, Industrial Management Azad University, CTB

09.1996 – 05.2002 Bachelor of Science, Electrical Engineering Ferdowsi University Turin, Italy Turin, Italy Tehran, Iran Mashhad, Iran

PROFESSIONAL SKILLS o Software Development for Test-bench o RF / Analog Integrated Circuits o PCB design o Layout Extraction (DRC/ LVS/ ERC) o Hardware Development o Doherty / Envelope Tracking Power Amplifiers o Test and measurements with on-wafer probe station, signal generator, etc.

SOFTWARE ◦ CADENCE VIRTUOSO (CUSTOM IC DESIGN) SKILLS o MATLAB Programming o Cadence Virtuoso (custom IC design) o Advanced Design System (ADS) o EAGLE PCB Design o Microwave Office (AWR) o Cadence Orcad (Pspice) o JAVA Programming

LANGUAGES

o English Fluent

o Italian Intermediate

o Persian Native

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